Brumrock

Are there standalone programs out there that can be used to program a Diligent FPGA module (I'm using an A7-35T) that doesn't require Vivado? I want to send *.bit and *.bin files to folks using the hardware without them having to resort to a full Vivado installation. Recommendations welcome. Thanks!

Hi guys, I'm VERY new to the CMOD A7-35T and Vivado. Looking at the A7 schematic and hunting around for information on Power On Reset it seems that the Reset line on the FPGA is the Program_b_0 pin (V10). However, I see no signs of the reset button mentioned in the reference manual or any other Power On Reset circuitry except for a 4.7k pull-up. If I try to assign my Reset line to pin V10, Vivado baulks at the suggestion indicating that the pin is reserved. My question is how is Power On Reset managed on the A7 and is the input assigned in Vivado? I see plenty of examples n Verilog where a reset is used but this always seems to appear out of nowhere, pin out assignments are not present. Perhaps an external PoR is needed? I have created a PoR scheme using a few flip flops that should work but Vivado provides me with numerous warnings regarding its use as a PoR solution I'm using Vivado 2020.2 on Windows 10 and my application is in Verilog. Thanks for your help.