TanjB

OK, I figured it out. LUT elements is an exactly defined number, for any given chip. "logic cells" is just a made up marketing number intended to convey overall capability: https://xilinx.fandom.com/wiki/Logic_Cells Got it now.

Where does Digilent describe the applicability of that license? How can I be sure that, for example, sources which are in the Basys-3 Abacus example, are all covered by this license posted in a completely different Git at a different date, without any link between the two or even explanation of the intent of that master license? That makes no sense. Proper practice is to include the license document in the Git for each project. With your current arrangement if I use one of the excellent library elements there and then send that to a client, the client's legal is likely to reject the overall project as including sources of uncertain licensing. The examples are a wonderful resource and a reason to recommend Digilent prototyping boards, but that license needs to be attached to projects, not randomly posted without any supporting context. For all anyone knows, Sam Kristoff could simply have been saving work in progress and never intended for use.

Ah. I was going by what was in Vivado when the part is selected. There seems to be a problem at Xilinx. Only 2/3rds of the device seems to be supported. These same numbers are visible in video tutorials for Basys3 shown online, so it is not just my copy of Vivado.

The Digilent product page and box claim there are 33280 logic elements / 5200 slices and 1,800 kbit of memory in the FPGA. But the FPGA is identified as an Artix-7 35, which is significantly smaller than that. You would need a 7-50 to match the claimed specs. This seems like a large error in the claimed spec for your board?