titijmc

Thank you @zygot for your long answer but I was aware of most of things that you put in it. My question was essentially about the clocks : since the lab 1 example of UG936 uses two clock-pins (AD11 for CLK_N and AD12 for CLK_P) and I know only one clock-pin on my Arty-A7 (E3), I wonder if it is possible to run this example on my board and which are the pin I have to use instead of AD11 and 1D12. Regards

Hello I wanted to play with the examples (labs) of the "Vivado Desing Suite Tutorial Programming and Debugging" (UG936) but I only have an Arty-7 board. In the constraint file and in the pinout information (p.9) I see that the examples use two clock-pins (AD11 for CLK_N and AD12 for CLK_P). But on my Arty-7 I know only one clock-pin (E3). Is there another one ? Furthermore is it possible to play these examples on Arty-7 ? Sorry if you find my question silly but I am a newbie on FPGA and I found no explanation in the Xilinx tutorial. Thank in advance for any reply Jack-Michel