Hi there,
I am quite new to FPGA and would like first to apologize if my question is *stupid* :-)
I have read already quite a lot and I am kind of stuck. Any help appreciated ?
Hardware
Card: Nexys Video
Vivado 2016.4
What I would like to do
I have an external TTL signal (3.3 V, 1 kHz) connected to the Pmod A, ja[0] pin (and the ground to GNB) .
As a test, I would like to read this signal, fill a FIFO and then read the FIFO buffer when the buffer is full. I do not mind to lose data; I just want to see (on the computer) some raw data once in a while.
ISSUES
From the SDK terminal, I receive weird data like "²’ÒŠRj$ª²šÒŠRj$ª²¢".
My top module
`timescale 1ns / 1ps
module oscillo(clk, uart_rx_out, TTL_in,sw);
input clk;
input sw;
input [0:0] TTL_in; // These are input data
output uart_rx_out;
reg [0:0] TTL_in_reg; always @(posedge clk) TTL_in_reg <= TTL_in;
wire [0:0] q_fifo; // These are output data
fifo_generator_0 myFifo (
.clk(clk), // input wire clk
.din(TTL_in_reg), // input wire [0 : 0] din
.wr_en(wrreq), // input wire wr_en
.rd_en(rdempty), // input wire rd_en
.dout(q_fifo), // output wire [0 : 0] dout
.full(wrfull), // output wire full
.empty(wrempty) // output wire empty
);
// The flash ADC side starts filling the fifo only when it is completely empty,
// and stops when it is full, and then waits until it is completely empty again
reg fillfifo;
always @(posedge clk)
if(~fillfifo)
fillfifo <= wrempty; // start when empty
else
fillfifo <= ~wrfull; // stop when full
assign wrreq = fillfifo;
assign rdempty = ~ fillfifo;
microblaze_mcs_0 myMCS (
.Clk(clk), // input wire Clk
.Reset(sw), // input wire Reset
.GPI1_Interrupt(GPI1_Interrupt), // output wire GPI1_Interrupt
.INTC_IRQ(INTC_IRQ), // output wire INTC_IRQ
.UART_txd(uart_rx_out), // output wire UART_txd
.GPIO1_tri_i(fillfifo), // input wire [0 : 0] GPIO1_tri_i
.GPIO2_tri_i(q_fifo) // input wire [0 : 0] GPIO2_tri_i
);
endmodule
My xdc file
## FPGA Configuration I/O Options
set_property CONFIG_VOLTAGE 3.3 [current_design]
set_property CFGBVS VCCO [current_design]
set_property -dict { PACKAGE_PIN AB22 IOSTANDARD LVCMOS33 } [get_ports { TTL_in }]
## Board Clock: 100 MHz
set_property -dict { PACKAGE_PIN R4 IOSTANDARD LVCMOS33 } [get_ports { clk }];
create_clock -add -name clk_100m -period 10.00 [get_ports clk]
## Reset Switch
set_property -dict {PACKAGE_PIN E22 IOSTANDARD LVCMOS12} [get_ports {sw}];
set_property -dict { PACKAGE_PIN AA19 IOSTANDARD LVCMOS33 } [get_ports { uart_rx_out }]
My helloword.c for the sdk
#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xparameters.h" // add
#include "xiomodule.h" // add
volatile char int_flag = 0; // millisecond counter variable
//function which is called by the GPI interrupt when one of its bits goes hi
void MyInterruptFlagSet( void* ref) {
int_flag = 1; // when it receives interrupt, set c
}
int main()
{
init_platform();
u32 data;
u16 my_secs = 0;
XIOModule gpi;
//print("Setting up GPI\n\r");
data = XIOModule_Initialize(&gpi, XPAR_IOMODULE_0_DEVICE_ID);
data = XIOModule_Start(&gpi);
//setting up interrupt handlers and enables them
microblaze_register_handler(XIOModule_DeviceInterruptHandler,
XPAR_IOMODULE_0_DEVICE_ID); // register the interrupt handler
// Makes the connection between the Id of the interrupt source and the associated handler that is to run when the interrupt is recognized.
XIOModule_Connect(&gpi, XIN_IOMODULE_GPI_1_INTERRUPT_INTR, MyInterruptFlagSet,
NULL); // register timerTick() as our interrupt handler
XIOModule_Enable(&gpi, XIN_IOMODULE_GPI_1_INTERRUPT_INTR); // enable the interrupt
microblaze_enable_interrupts(); // enable global interrupts
while (1)
{
while(int_flag == 0 ) //wait till interrupt flag goes high
;
data = XIOModule_DiscreteRead(&gpi, 2); // read counts (channel 2)
xil_printf("%d: %d\n\r",my_secs, data);
my_secs++;
int_flag = 0; //clear flag
}
cleanup_platform();
return 0;
}