Guru

Yes, Pre-amplification and Filtering is necessary with Lab-Grade Oscilloscope for fine tuning the received signal before applying to FPGA which costs more , now i think its not a cakewalk for a newbie.... Thanks for the information D@n!!

Hi zygot , Some theses suggest that we can design our own ADC by utilising LVDS available on FPGA board .. by providing RF signal to LVDS ..I need to explore more on this ... Thanks

Hi, I want to design Zigbee RF Receiver which operates at 2.4GHz and should include custom ADC and filter Design using VHDL ,for this i need to connect Antenna to the FPGA (Artix-7 35T). 1)Where to connect the antenna/How to receive the RF signal for further process? 2)Any other way to design Zigbee Receiver on my own without the use of external PMOD Zigbee transreceiver? 3)Or how to achieve this using SERDES(to which pin i need to connect the antenna) as suggested in https://github.com/newhouseb/onebitbt I think SDR is not suitable for this specific case Thanks,