tridot64

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tridot64 reacted to a post in a topic: gibberish on Hello world project on Vitis 2020.2 and Zybo z7 10 November 9, 2021
gibberish on Hello world project on Vitis 2020.2 and Zybo z7 10

tridot64 replied to tridot64's topic in Tutorials

Apparently using xil_printf.h 's xilprintf function gives me a proper outputs. I got that while implementing axi gpio via the tutorial in here. I would still be happy to be educated on why the previous attempt didnt work. Thanks in advance.
gibberish on Hello world project on Vitis 2020.2 and Zybo z7 10

tridot64 posted a topic in Tutorials

I am a newbie to FPGA and all things related. I installed all the board files from the repository. Created my block design and ran the block automation. I created a HW platform and a SW application with the template. I put my Zybo Z7 10 on JTAG mode. i can verify that the UART prints out data when it passes a print statement. But the printed value doesnt correspond to what is supposed to be in it. I have attached necessary screenshots. I am guessing that i have an error with the UART. To make sure my cable wasnt at fault, I reset the system to get the OOB image "initializing init:done ..". Both the Tera term and the vitis terminal gave the same output. VIvado version 2020.2 OS: Windows 11 Thanks in Advance.