Hi @pulkit,
The application is trying to fit inside the block ram (BRAM) that is integrated with the FPGA, you will, as you already surmised, want to adjust the linker script.
You can do this by opening the lscript.ld that is directly below the main.cc you have open in your screenshot. Scroll down to the "Section to Memory Region Mapping" and adjust the Memory Region for each of the section names to "mig_7series_0_memaddr".
Let me know if you have any questions.
Thanks,
JColvin
