I am using Xilinx Kria kv260 board along with raspberry pi camera module interfacing. I made the hardware design, generated the bitstream and exported the into the Vitis (2021.1) project. The project build successfully with the zero errors and warnings. But as soon as I run the project by connecting the board in the FSBL initialization mode, the project is getting stuck at Launching : rst -processor. And it is getting timed out after 60 sec giving a warning msg as shown below. And if I pressed on Proceed button, it is being an empty launch with nothing on the console and terminal. (app_proj is the name of the project in the image below)
I referred to the community and tried to run the project without selecting the FSBL mode. Then also Vitis is getting stuck at Launching : psu_init, as it is a tcl script present in the hardware files for PS initialization.
Vitis stuck at Debugger Launching
in FPGA
Posted · Edited by Vishank
Hello there,
I am using Xilinx Kria kv260 board along with raspberry pi camera module interfacing. I made the hardware design, generated the bitstream and exported the into the Vitis (2021.1) project. The project build successfully with the zero errors and warnings. But as soon as I run the project by connecting the board in the FSBL initialization mode, the project is getting stuck at Launching : rst -processor. And it is getting timed out after 60 sec giving a warning msg as shown below. And if I pressed on Proceed button, it is being an empty launch with nothing on the console and terminal. (app_proj is the name of the project in the image below)
I referred to the community and tried to run the project without selecting the FSBL mode. Then also Vitis is getting stuck at Launching : psu_init, as it is a tcl script present in the hardware files for PS initialization.
Kindly help me out with the issue.
Thanks, and Regards,
Vishank