[Place 30-722] Terminal 'adc_dat_i[0]' has IOB constraint set to TRUE, but it is either not connected to a FLOP element or the connected FLOP element could not be brought into the I/O
While working with FPGA , after implementation, this critical warning is been shown
How can I overcome this
I am trying to connect xadc of Zynq 7020 to my design.
I have attached my design,warning messages and xdc file screenshots.