schencej

Okay I understand now. TMDS will actually suite my needs so only having a 3.3V bank is fine. I had tried using it before but I wasn't aware of the required pull-up resistor. Also, I actually was assigning my output pins to use LVDS_25, I just copied the wrong lines into my post. Thanks for your response!

Hello, I'm trying to output a differential signal using the PMOD pins on my board. My attempts so far have been unsuccessful. I just have a simple test set up which creates a differential clock signal using the Verilog shown below. module top ( input clk, output clk_test, output clk_test_n ); generate OBUFDS #(.IOSTANDARD("LVDS_25")) obufds_test(.I(clk), .O(clk_test), .OB(clk_test_n)); endgenerate And I map these signal to two PMOD pins. set_property -dict { PACKAGE_PIN W14 IOSTANDARD LVCMOS33 } [get_ports { clk_test }]; #IO_L8P_T1_34 Sch=jb_p[1] set_property -dict { PACKAGE_PIN Y14 IOSTANDARD LVCMOS33 } [get_ports { clk_test_n }]; #IO_L8N_T1_34 Sch=jb_n[1] The documentation talks a lot about inputting differential signals but nothing about driving them. Is this possible?