Hi @skinnypanda
Take a look at the "Language Templates" menu in the tool. There's both some example code for inferring BRAMs as well as some templates for instantiating BRAM primitives directly.
Thanks,
Arthur
Hello,
I'll be honest in saying that I've read through this thread a few times now, but I don't understand how the breakdown in communication happened. I do not think it is my place to decide who is right or wrong or who started what, nor is a random forum thread on the internet the place to do it; we're all adults who know they can learn more things regarding FPGAs/SoC hardware and software tools.
But I'll try to answer some of the original questions.
Not terribly difficult with the existing Xilinx functions, though I had to do some digging to find them.
These functions are the same ones used in zygot's original reply:
^This is checking for serial data being available
^This one gets gets the actual character and stores it in a user variable.
You can then do a switch case statement like zygot did to process if the user chose 'y' or 'n' or could do a if else if statement style like the one that is available on Xilinx's Github, https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/uartps/examples/xuartps_low_echo_example.c (which uses the same XUartPS_ functions from various Xilinx provided libraries) that takes a letter character received in the serial terminal and then spits back out the opposite case (upper or lower) of that same character. You could then modify either example to do some other function once it gets that that particular case/if statement. I can't find the power supply for my zedboard at the moment, but I was able to readily confirm that Xilinx's example worked as is on a blank C application project on a Arty Z7-10 (using Tera Term) that had more or less the exact same block design as created in the tutorial you linked (minus the custom IP) in Vivado/Vitis 2020.1. The caveat with the Xilinx example is that it's a blocking function in the sense that it's doing nothing else while waiting for the user input; maybe that's fine for your system, maybe not.
Thanks,
JColvin
skinnypanda got a reaction from artvvb in how to create a block ram in zedboard, vivado 2020.1?
skinnypanda got a reaction from JColvin in ERROR : (XSDB Server)ERROR: [Hsi 55-1571] The design file project_1_wrapper/export/project_1_wrapper/hw/zed.xsa is already opened
