Jump to content

Jay Patel

Newcomers
  • Posts

    1
  • Joined

  • Last visited

Posts posted by Jay Patel

  1. Hello  sir

    We purchased "Arty-Z7-20" a few weeks ago.

    We are trying to boot a project using the petalinux.

    We have followed the manual given in the below links.

     

    https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_1/ug1144-petalinux-tools-reference-guide.pdf

    https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_1/ug1157-petalinux-tools-command-line-guide.pdf

     

    But the Arty-Z7-20 board didn't get booted via jtag or SD card.

    We have also followed steps provided on belowed github, but it won't work..

     

    https://github.com/Digilent/Petalinux-Arty-Z7-20

     

    Output while running boot command shown below,

    '$ petalinux-boot --jtag --prebuilt 3 --hw_server-url TCP:127.0.0.1:3121'

    INFO: Sourcing build tools
    WARNING: Will not program bitstream on the target. If you want to program bitstream,
    WARNING: please run petalinux-package --prebuilt to put the bitstream to the prebuilt directory,
    WARNING: or use --fpga --bitstream option to specify a bitstream.
    INFO: Append dtb - /home/harshil/FPGA/Project_Petalinux/project_linux/pre-built/linux/images/system.dtb and other options to boot zImage
    INFO: Launching XSDB for file download and boot.
    INFO: This may take a few minutes, depending on the size of your image.
    rlwrap: warning: your $TERM is 'xterm-256color' but rlwrap couldn't find it in the terminfo database. Expect some problems.: Inappropriate ioctl for device
    INFO: Downloading ELF file: /home/harshil/FPGA/Project_Petalinux/project_linux/pre-built/linux/images/zynq_fsbl.elf to the target.               
    INFO: Downloading ELF file: /home/harshil/FPGA/Project_Petalinux/project_linux/pre-built/linux/images/u-boot.elf to the target.                                          
    INFO: Loading image: /home/harshil/FPGA/Project_Petalinux/project_linux/pre-built/linux/images/system.dtb at 0x00100000                                                  
    INFO: Loading image: /home/harshil/FPGA/Project_Petalinux/project_linux/pre-built/linux/images/uImage at 0x00200000                                                      
    INFO: Loading image: /home/harshil/FPGA/Project_Petalinux/project_linux/pre-built/linux/images/rootfs.cpio.gz.u-boot at 0x04000000                                      
    INFO: Loading image: /home/harshil/FPGA/Project_Petalinux/project_linux/pre-built/linux/images/boot.scr at 0x03000000                                                    
                                                                                                                                                                             
    INFO: SOC Silicon version is 3.1.

×
×
  • Create New...