Dachs

HI JColvin, thanks for the answer. I got rid of that issue and it almost compiles successfully! Honestly don't know what the issue was, I just started from scratch (again) :). Thanks all!

Hello together, I tried to integrate different PMODs from the current IP library (ACS, Monochromatic OLED). I added them as a block in Vivado and when I integrate the HW into Vitis and try to compile it with an empty hello world c file, it throws me the following error message: 16:52:10 ERROR : Failed to openhw "D:/XilinxProjects/VitisWorkspace/designo_wrapper/export/designo_wrapper/hw/designo_wrapper.xsa" Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors. 16:52:10 ERROR : Failed to update application flags from BSP for 'OLED_app'. Reason: null java.lang.NullPointerException at com.xilinx.sdx.sw.internal.SDxSwPlatform.<init>(SDxSwPlatform.java:305) at com.xilinx.sdx.sw.internal.SDxSwPlatform.create(SDxSwPlatform.java:214) at com.xilinx.sdx.sdk.core.util.SdkPlatformHelper.getSwPlatform(SdkPlatformHelper.java:61) at com.xilinx.sdx.sdk.core.build.SdkMakefileGenerationListener.getSwPlatform(SdkMakefileGenerationListener.java:160) at com.xilinx.sdx.sdk.core.build.SdkMakefileGenerationListener.syncAppFlags(SdkMakefileGenerationListener.java:78) at com.xilinx.sdx.sdk.core.build.SdkMakefileGenerationListener.preMakefileGeneration(SdkMakefileGenerationListener.java:48) at com.xilinx.sdk.managedbuilder.XilinxGnuMakefileGenerator.notifyPreMakefileGenerationListeners(XilinxGnuMakefileGenerator.java:91) at com.xilinx.sdk.managedbuilder.XilinxGnuMakefileGenerator.regenerateMakefiles(XilinxGnuMakefileGenerator.java:75) at org.eclipse.cdt.managedbuilder.internal.core.CommonBuilder.performMakefileGeneration(CommonBuilder.java:1006) 16:52:12 ERROR : Failed to compute checksum of hardware specification file used by project 'OLED_app' 16:52:12 ERROR : Failed to openhw "D:/XilinxProjects/VitisWorkspace/designo_wrapper/export/designo_wrapper/hw/designo_wrapper.xsa" Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors. 16:52:12 ERROR : Failed to openhw "D:/XilinxProjects/VitisWorkspace/designo_wrapper/export/designo_wrapper/hw/designo_wrapper.xsa" Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors. 16:52:12 ERROR : Failed to openhw "D:/XilinxProjects/VitisWorkspace/designo_wrapper/export/designo_wrapper/hw/designo_wrapper.xsa" Reason: ERROR: [Common 17-39] 'hsi::open_hw_design' failed due to earlier errors. When I remove these Digilent PMOD IPs, it works. I'm using 2020.2. Are these IPs not compatible with the newer Xilinx versions? Thanks and best regards!