Hello,
I receive my I2C Audio PMOD (http://store.digilentinc.com/pmodi2s-stereo-audio-output/) today and I want to use it with my ZYBO.
My I2S transmitter look like this:
library ieee;
use ieee.std_logic_1164.all;
entity I2S_Transmitter is
generic (
DATA_WIDTH : integer := 32
);
port (
Clock : in STD_LOGIC;
MCLK : out STD_LOGIC;
Data_In : in STD_LOGIC_VECTOR(DATA_WIDTH - 1 downto 0);
LRCLK : Out STD_LOGIC;
DOUT : out STD_LOGIC;
Reset : in STD_LOGIC;
Empty : out STD_LOGIC
);
end entity;
architecture I2S_Transmitter_Arch of I2S_Transmitter is
signal InputBuffer : std_logic_vector(DATA_WIDTH - 1 downto 0) := (others => '0');
signal Empty_Signal : std_logic := '1';
signal DOUT_D1 : std_logic := '0';
signal WS : std_logic := '0';
signal Counter : integer := 0;
begin
LRCLK_Logic:
process (Clock)
begin
if(falling_edge(Clock)) then
if(Reset = '1') then
Counter <= 0;
WS <= '1';
else
Counter <= Counter + 1;
if(Counter > (DATA_WIDTH / 2 - 1)) then
WS <= '1';
else
WS <= '0';
end if;
if(Counter = (DATA_WIDTH - 1)) then
Counter <= 0;
end if;
end if;
end if;
end process;
Load_and_shift_out_Data:
process(Clock)
begin
if(falling_edge(Clock)) then
if(Reset = '1') then
InputBuffer <= (others => '0');
Empty_Signal <= '1';
else
if(Empty_Signal = '1') then
InputBuffer <= Data_In;
Empty_Signal <= '0';
else
InputBuffer <= InputBuffer((DATA_WIDTH - 2) downto 0) & '0';
DOUT_D1 <= InputBuffer(DATA_WIDTH - 1);
end if;
if(Counter = (DATA_WIDTH - 1)) then
Empty_Signal <= '1';
end if;
end if;
end if;
end process;
MCLK <= Clock;
LRCLK <= WS;
DOUT <= DOUT_D1;
Empty <= Empty_Signal;
end architecture I2S_Transmitter_Arch;
With this Testbench:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity I2S_Transmitter_TB is
-- Port ( );
end I2S_Transmitter_TB;
architecture I2S_Transmitter_TB_Arch of I2S_Transmitter_TB is
signal MCLK : std_logic;
signal WS : std_logic := '0';
signal SCK : std_logic := '1';
signal DOUT : std_logic;
signal Empty : std_logic := '0';
signal Reset : std_logic := '0';
signal Data_In : std_logic_vector(31 downto 0) := (others => '0');
-- 8,192 MHz Clock
constant clk_period: Time := 122 ns;
constant ws_period: Time := 16 * clk_period;
begin
DUT:
entity work.i2s_transmitter
port map (
LRCLK => WS,
MCLK => MCLK,
Data_In => Data_In,
Clock => SCK,
DOUT => DOUT,
Empty => Empty,
Reset => Reset
);
CLOCK:
process
begin
wait for clk_period / 2;
SCK <= not SCK;
end process;
STIMULUS:
process
begin
Data_In <= x"507B507B";
Reset <= '1';
wait for 10 us;
Reset <= '0';
wait for 10 us;
Data_In <= (others => '0');
wait for 30 ms;
Reset <= '1';
wait for 5 ms;
end process;
end I2S_Transmitter_TB_Arch;
I use Port JC on my ZYBO and this is my XDC-File:
# Clock
set_property PACKAGE_PIN L16 [get_ports Clock_In]
set_property IOSTANDARD LVCMOS33 [get_ports Clock_In]
set_property PACKAGE_PIN V15 [get_ports MCLK]
set_property IOSTANDARD LVCMOS33 [get_ports MCLK]
set_property PACKAGE_PIN W15 [get_ports LRCLK]
set_property IOSTANDARD LVCMOS33 [get_ports LRCLK]
set_property PACKAGE_PIN T10 [get_ports DOUT]
set_property IOSTANDARD LVCMOS33 [get_ports DOUT]
set_property IOSTANDARD LVCMOS33 [get_ports DEM]
set_property PACKAGE_PIN T11 [get_ports DEM]
The clock frequency for MCLK is 8,192MHz, generated with a MMCM. I´ve connected this speaker (http://store.digilentinc.com/speaker/) to the PMOD, but I doesn´t hear any sound. Why?
Thank you for help!
