Hi @JColvin,
Thanks, for your feedback.
On our side we confirm than due to the output level shifter buffer on the TCLK of the JTAG-SMT3, this JTAG probe is not compatible with Lattice.
If we remove this buffer, the probe became compatible with Lattice.
On our first version of the board we had the luck or the unluck that it worked !
To go ahead, we are interested to implement the FTDI chip as a Digilent JTAG probe compatible with Xilinx.
As already asked in this tread, is it possible to buy a Digilent licence in order to design our own JTAG probe?
Thanks for your help.
Marc