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Is the "Data Gen" block a known good AXI/DMA block, or something that is under development? If it is under development, the story below may be relevant. I have implemented PL-PS on various Digilent boards and did have to use ILA to get the signalling right. My problems were at the PL side, specifically the Valid and Ready signals. Essentially the Slave can deassert Ready at ~anytime, including while the Master is clocking data, hence the Master needs to test Ready after clocking and may need to reclock same data multiple times, else the transfer will come up short on data. The diagram below is something I found, and similar diagrams are in the Xilinx documents. See the (3) and (5) cases in the below - where D0 and D3 are clocked multiple times: For my work, the Ready being deasserted situation was not a problem with small packets, but became a barrier for larger packets, maybe related to FIFO size. Dave

Hi JColvin, Good question! External clock is 100 MHz From above, I think the Frequency Divider is 16x2=32 The SPI clock would be: 100MHz/32 = 3.125MHz I was using 16x16 and rebuilt with the above settings, no change in results. Thanks, Dave

By originator, minor change, no effect: for(int i=0;i<3;i++) { Status = XSpi_Transfer(SpiInstancePtr, &WriteByte1, &ReadByte1, 1); if (Status != XST_SUCCESS) { return XST_FAILURE; } Status = XSpi_Transfer(SpiInstancePtr, &WriteByte2, &ReadByte2, 1); if (Status != XST_SUCCESS) { return XST_FAILURE; } Status = XSpi_Transfer(SpiInstancePtr, &WriteByte3, &ReadByte3, 1); if (Status != XST_SUCCESS) { return XST_FAILURE; } xil_printf("0x%02X -> 0x%02X% 0x%02X -> 0x%02X% 0x%02X -> 0x%02X\r\n", WriteByte1,ReadByte1, WriteByte2,ReadByte2, WriteByte3,ReadByte3); }

I have the onboard accelerometer working from VHDL, but not from microblaze with AXI Quad SPI. > It always reads a value of 0x00, for the given settings I think it should return 0xAD > I have tested in 2019.2 and 2021.2, same results. > I have tried many settings for the "options" parameter: Status = XSpi_SetOptions(SpiInstancePtr, options); I am thinking something is misconfigured. Any clues or a working example would be greatly appreciated. Thanks, Dave Below is the test code that was adapted from first comment: ----- // https://chanon-khong.medium.com/zynq-reading-analog-value-from-adc-ltc2314-with-axi-quad-spi-11be59b6d693 /***************************** Include Files *********************************/ #include <stdio.h> #include "platform.h" #include "xil_printf.h" #include "xparameters.h" /* XPAR parameters */ #include "xspi.h" #include "sleep.h" #define SPI_DEVICE_ID XPAR_AXI_QUAD_SPI_0_DEVICE_ID int SpiPolledExample(XSpi *SpiInstancePtr, u16 SpiDeviceId); static XSpi SpiInstance; /* The instance of the SPI device */ int main(void) { init_platform(); int Status; print("\r\nHello World\n\r"); Status = SpiPolledExample(&SpiInstance, SPI_DEVICE_ID); if (Status != XST_SUCCESS) { return XST_FAILURE; } cleanup_platform(); return 0; } int SpiPolledExample(XSpi *SpiInstancePtr, u16 SpiDeviceId) { int Status; XSpi_Config *ConfigPtr; /* Pointer to Configuration data */ ConfigPtr = XSpi_LookupConfig(SpiDeviceId); if (ConfigPtr == NULL) { return XST_DEVICE_NOT_FOUND; } Status = XSpi_CfgInitialize(SpiInstancePtr, ConfigPtr, ConfigPtr->BaseAddress); if (Status != XST_SUCCESS) { return XST_FAILURE; } u32 options = XSP_MASTER_OPTION | XSP_MANUAL_SSELECT_OPTION; //u32 options = (XSP_MASTER_OPTION | XSP_CLK_ACTIVE_LOW_OPTION ) | XSP_MANUAL_SSELECT_OPTION; Status = XSpi_SetOptions(SpiInstancePtr, options); if (Status != XST_SUCCESS) { return XST_FAILURE; } XSpi_Start(SpiInstancePtr); XSpi_IntrGlobalDisable(SpiInstancePtr); XSpi_SetSlaveSelect(SpiInstancePtr, 0x01); unsigned int *spibase = (unsigned int *)0x44A00000U; unsigned int *spicr = spibase+0x60/4; unsigned int d0 = *spicr; xil_printf("spicr = 0x%08X -> 0x%08X\r\n",spicr,d0); u8 WriteByte1=0x0B; // instr = 0x0B => read accel u8 WriteByte2=0x00; // addr = 0x00 => read 0xAD u8 WriteByte3=0x00; // addr = 0x00 => dummy u8 ReadByte1=0xFF; u8 ReadByte2=0xFF; u8 ReadByte3=0xFF; for(int i=0;i<3;i++) { Status = XSpi_Transfer(SpiInstancePtr, &WriteByte1, &ReadByte1, 1); if (Status != XST_SUCCESS) { return XST_FAILURE; } XSpi_Transfer(SpiInstancePtr, &WriteByte2, &ReadByte2, 1); if (Status != XST_SUCCESS) { return XST_FAILURE; } XSpi_Transfer(SpiInstancePtr, &WriteByte3, &ReadByte3, 1); if (Status != XST_SUCCESS) { return XST_FAILURE; } xil_printf("0x%02X -> 0x%02X% 0x%02X -> 0x%02X% 0x%02X -> 0x%02X\r\n", WriteByte1,ReadByte1, WriteByte2,ReadByte2, WriteByte3,ReadByte3); } return XST_SUCCESS; }