MFrandsen

Hi JColvin, So the on-board FTDI design will not drive if using the JTAG port on J8? Or is a specific configuration needed for this to function? One reason would be to use another debugger than what Eclipse/Vitis offers. That could be j-link and Ozone, a Lauterbach solution, or simply an external svf player to communicate with an FPGA core alongside the design once it has booted from SD. Br Michael

Hi @Michael Fischer, I am looking for the same answer for my Zybo Z7 in order to attach a 3rd party debugger using xvcd. Did you get this solved? Another way I was looking for is to use JP3 and switch into separate chains but I have not traced this solution yet. Br Michael

Hi Attila, I just received my AD2 yesterday and am positively surprised on the possibilities of this device. I have worked in testing for many years (decades) specifically on IEEE 1149 (JTAG) and immediately started looking for jtag/swd support of on the device. I found this post, and see that it went in beta in January 2018, but the official release I find is a version 3.18.1 more than 4 years after the beta. Will there be a release or will I have to go for beta versions? SVF file support would also be great as this could help in configuring FPGAs and the use SWD for MCU programming so the device serve even more purposes on top of all the awesome stuff it already does. EDIT: Ah, nope it is the date you joined and not the date of the beta I was looking at ;o) /Mike